资源列表
M_ACTION1
- 使用fpga实现任意长度，任意方程的伪随机系统码-Using FPGA to achieve arbitrary length, any equation of the pseudo random system code
DDS
- FPGA基于FPGA的DDS设计verilog程序-FPGA DDS project verilog procedure
dds
- 已实际测试 FPGA 实现 DDS程序-FPGA DDS
cepincexiang
- 基于FPGA的频率计，能在数码管上显示频率 相位等信息，-FPGA-based frequency counter, frequency and phase information can be displayed on the LED,
LCD12864-display-picture
- lcd12864液晶显示图片，资料+详细代码-lcd12864 display picture:the code and the documents
clock_18b20
- 基于lcd1602的温度计和数字时钟,包含详细的代码解释和实现方式-Lcd1602 based thermometers and digital clock
adc9280
- 模数转换，并把采样电压显示在数码管上，包含详细代码+详细资料-Analog-digital conversion, and the sampled voltage is displayed on the digital tube, containing detailed codes+ details
SPCQF
- 8路抢答器的Verilog代码实现，包含详细的资料和代码-8 Responder Verilog code that contains detailed information and code
source
- 实现永久流水灯的verilog .v文件-source verilog
run_flash
- 实现闪灯功能，在开发板运行时，通过按键来实现闪灯的目的。-Achieve flash function, run on a development board, through the key to achieve the purpose of the flash.
QuartusII_IP_Core
- 以设计双端口RAM为例说明QuartusII中利用免费IP核的设计的详细教程-To design dual-port RAM as an example of the use of a detailed tutorial QuartusII free IP core design
1_ADDER
- ADD加法运算可实现从0到10的加法运算-ADD addition can be realized 0 to 10 of the addition operation