资源列表
segled
- 数码管fpga Verilog HDL代码-Digital fpga Verilog HDL Code
sdram
- ISE14.4环境编程，XILINX spartan3E,SDRAM完整编程-xilinx sdram
sdram_5
- SDRAM的verilog描述，包含顶层设计，测试平台代码，精确描述-SDRAM is verilog descr iption, including top-level design, testbench code, an accurate descr iption of
nfc
- 近场通信的verilog描述，包含向量名定义，顶层设计等等的精确描述-Verilog descr iption of near field communication, including the vector name is defined, an accurate descr iption of the top-level design, etc.
ram_3
- RAM的verilog描述，包含向量名定义，顶层设计等等的精确描述-RAM in verilog descr iption, including vector name is defined, an accurate descr iption of the top-level design, etc.
usb_host_device
- usb时钟的verilog描述，包含向量名定义，顶层设计等等的精确描述-usb clock verilog descr iption, including the vector name is defined, an accurate descr iption of the top-level design, etc.
pci
- pci总线的verilog描述，包含向量名定义，顶层设计等等的精确描述-usb clock verilog descr iption, including the vector name is defined, an accurate descr iption of the top-level design, etc.
AES
- 这是一个AES加密算法的程序，适用verilog hdl语言写的-A AES ALGORITHM
8BIT_CPU
- 一个8位的CPU设计，用verilog语言写的，希望有用-A CPU OF 8 BITS
A_CPU_verilog
- 这是一个verilog编写的CPU程序，希望对初学者有所帮组吧-a cpu
VLSI_RISC_chip_disk
- 这是《大型RISC处理器》书中附带光盘的内容，希望有用吧-a disk
barrel_shift
- This project si barrel shifter for an 8-bit