资源列表
4.LED_SHIFT
- xilinx led shift vhdl program
codes
- 5 simple verilog codes: Arithmetic.v - arithmetic operations on verilog Accumulator.v - 8 bit adder accumulator counterfpga.v - 4 bit up counter w/ fpga code UpDown3.v - 4 bit Up-down counter w/fpga code pattefier.v - pattern/sequence ident
VideoSystem
- This project - Altera Cyclone based Videocard - VHDL source.
ps2_vga
- ps2 vga for verilog Altera de2
ps2_keyboard
- Ps2 keyboard for verilog Altera DE2
ps2_vga_top
- PS2 WITH VGA FOR VERILOG ALTERA DE2
vga-example
- Basic VGA implementation on the Altera DE1
xhlb
- 数字信号的滤波电路VHDL描述,用于对输入的信号进行数字滤波-Digital signal filter circuit described in VHDL
CPU
- 运用vhdl硬件描述语言在quartus II开发环境下独立设计与实现了基于精简指令集的五级流水线CPU的设计与实现。该流水CPU包括：取指模块，译码模块，执行模块，访存模块，写回模块，寄存器组模块，控制相关检测模块，Forwarding模块。该CPU在TEC-CA实验平台上运行，并且通过Debugcontroller软件进行单步调试，实验表明，该流水线CPU消除了控制相关、数据相关和结构相关。-Using vhdl hardware descr iption language developm
lcd_drv
- LCD driver for 2-lines LCD displays with controller
uart_fifo_cpu_if_sv_testbench_latest.tar
- Serial UART with byte wide register interface for control/status, data, and baud rate.
uart16750_latest.tar
- Implements a synthesizable 16550/16750 UART core.