CDN加速镜像 | 设为首页 | 加入收藏夹
当前位置: 首页 源码下载 嵌入式/单片机编程

资源列表

« 1 2 ... .56 .57 .58 .59 .60 6061.62 .63 .64 .65 .66 ... 33646 »
  1. sdram_driver_v2

    0下载:
  2. FPGA的SDRAM_DRIVER程序,已在DE2开发板上实测,可用。-The FPGA SDRAM DRIVER program, have been measured in the DE2 development board, the available.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-12
    • 文件大小:1.45kb
    • 提供者:张平安
  1. WM8731_config

    0下载:
  2. FPGA的语音识别芯片WM8731,已在DE2板子上实测,可用。-FPGA speech recognition chip WM8731, have been measured in DE2 board, available.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-13
    • 文件大小:1.93kb
    • 提供者:张平安
  1. PLL_50M_100M_24M

    0下载:
  2. FPGA的锁相环文件,已在DE2上实测,可用。-PLL have been measured in DE2 board, available
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-08
    • 文件大小:3.18kb
    • 提供者:张平安
  1. sin_generate

    0下载:
  2. FPGA的正弦函数发生器文件,实测,可用。-Sine function generator file, FPGA test, available.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-11
    • 文件大小:2.48mb
    • 提供者:张平安
  1. Electronic-organ

    0下载:
  2. 基于FPGA的电子琴,附带源文件。实测。-Electronic organ based on FPGA, with source files. The measured
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-10
    • 文件大小:1006.41kb
    • 提供者:张平安
  1. encrypt_8_tea_complete

    0下载:
  2. This complete project for 8-bit TEA algorithm. Actually, at least 32-bit for TEA and you can change number of bits. This folder consists of five vhdl files. one top level entity named encrypt_8 and the remaining four are low level entities.-This is c
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-14
    • 文件大小:4.06kb
    • 提供者:Mar Mar
  1. decrypt_8

    0下载:
  2. This file is top level entity of decrypt_8 project. This project is 8_bit decryption for TEA algorithm. You can change number of bits (at least 32 bit for TEA). This project is only for one round. You should use input as encryption output so that you
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-12
    • 文件大小:909byte
    • 提供者:Mar Mar
  1. low_level_decrypt_8

    0下载:
  2. This folder consists of five vhdl files. These are low level entities of top level entity named decrypt_8 project. -This folder consists of five vhdl files. These are low level entities of top level entity named decrypt_8 project.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-13
    • 文件大小:2.16kb
    • 提供者:Mar Mar
  1. sdram_ov7670_vga

    0下载:
  2. 基于OV7670摄像头的FPGA采集工程,通过VGA显示输出。-OV7670 camera based on FPGA acquisition projects through VGA display output.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-15
    • 文件大小:3.67mb
    • 提供者:微笑
  1. FPGA source files

    0下载:
  2. this is an introduction to best source code
  3. 所属分类:VHDL编程

    • 发布日期:2014-11-13
    • 文件大小:2.5kb
    • 提供者:kamyar
  1. SPI_slave-SPI-control-ADS8364

    0下载:
  2. FPGA控制ADS8364采集,采集的数据通过SPI上传,SPI做从机slave。-FPGA control ADS8364 acquisition, upload the data collected through the SPI port, SPI do slave slave.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-31
    • 文件大小:73.25kb
    • 提供者:瞿盛
  1. grey-code--FIFO-IP-core

    0下载:
  2. 基于格雷码的FIFO的IP核,调试可用于通信接口的队列传输。-Gray code based on FIFO IP core, debugging can be used for communication queue transmission interface.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-16
    • 文件大小:36.81kb
    • 提供者:瞿盛
« 1 2 ... .56 .57 .58 .59 .60 6061.62 .63 .64 .65 .66 ... 33646 »
搜珍网 www.dssz.com