资源列表
FPGA-based-design-of-DPLL
- 采用VHDL设计的全数字锁相环电路设计，步骤以及一些详细过程介绍。-VHDL design using all-digital PLL circuit design, detailed process steps and some introduction.
32-float-point-adder
- 32位浮点加法器。我第一次上载源码你就放过我吧，我就是想看一看加法器应该怎么做。-Floating point adder
verilog
- 主要包含了用verilog语言别写的实用于视频例如LCD等显示设备的音频与视频的控制系统，其中包括了延时代码的编写模块，希望对坐显示的有所帮助!-It contains the verilog language with written and practical at the videos of other LCD and other display devices such as audio and video control systems, including the delayed p
st7565r
- ST7565R 驱动65 x 132 Matrix LCD 中文版（内含相关寄存器中文注释及初始化步骤）-ST7565R 65 x 132 Dot Matrix LCD Controller/Driver
lattice_fpga
- lattice系列fpga入门例程，非常好的理解vhdl语言及fpga开发-good data for studying the lattice s fpga
16bit-CLA
- 16 bit carry look ahead adder verilog code
YCbCr_RGB_10bit
- YCbCr 转 RGB模块，以应用于项目中。 该模块可将10bitYCbCr分量视频转换为12bitRGB视频，需消耗乘法器。-YCbCr turn RGB module, to apply to the project. The module can be 10bitYCbCr component video converted to 12bitRGB video, need to consume multiplier.
FPGACPLD_protel3
- protel中fpga封装库3，非常难找的-protel library in fpga package three, very difficult to find the
IDE_Interface
- IDE接口程序，是用VERILOG写的，高手进阶程序-IDE interface program is written using VERILOG, master advanced procedures. .
LCD12864
- LCD12864驱动程序，包含基本显示，画线函数，画圆函数。-LCD12864 drivers, including the basic display, drawing a line function, draw a circle function.
8051ip
- fpga 51核，这个是我老师写的，现在就是输入输出io是分别定义的，希望能给大家提供一点帮助！-fpga 51 nuclear, this is written by my teacher, this is the input and output, respectively, the definition of io is the hope that we can provide a little help!
256.16-RAM
- VHDL语言编写，实现256×16RAM块功能，稍加修改即可改变RAM块的容量-VHDL language, achieving 256 ×16RAM block .A little change can change the capacity of the block RAM