资源列表
8051_ADC
- AT89C51 Based ADC Program using keil v3. Very useful.-AT89C51 Based ADC Program using keil v3. Very useful.
part2
- Implement a 3-digit BCD counter. Display the contents of the counter on the 7-segment displays, HEX2− 0. Derive a control signal, from the 50-MHz clock signal provided on the DE2 board, to increment the contents of the counter at one-se
NiosII_SOPCBuilder_Labs
- 清华大学Altera实验室有关Sopc及Nios设计的实验教程，并附有源码。-Tsinghua University and the Altera Nios Design Laboratory on the experimental Sopc tutorials, along with source code.
SmallPC2
- 利用fpga设计最小系统的verilog程序。-Minimum system design using fpga verilog program.
ISP_FPGA_PAPER_05
- 视频预处理关键技术研究.nh,视频预处理关键技术研究.nh-Video pre-key technology. Nh, video pre-key technology. Nh
ps2scan
- 利用FPGA接受PS/2键盘的信号，并且识别按键键值，以16位输出出去-Using FPGA to accept PS/2 keyboard signal, and to identify key key, out of 16-bit output
rec
- 基于vhdl编写的FPGA与PC串行通信的接收信号解码程序，调试已通过。-Vhdl prepared based on FPGA and PC serial communication received signal decoding process, debugging has been passed.
Verilog_basic_lessons
- 这个是一本不错的VERILOG的入门教程。希望对新手有用。-This is a good introductory tutorial VERILOG. Want to be useful for beginners.
taxi
- 该程序为东南大学自动化学院数字课程设计的程序，出租车计价器（08级的设计），采用VHDL实现，有详细的设计过程及最总的原理图-The program for the Institute of Automation, Southeast University Digital curriculum design process, the taxi meter (08 designs), the use of VHDL implementation, detailed design process a
4-16
- 4-16译码器。按0000-1111编码，相应的得到输出。下载后可实现-4-16 decoder. Encoded by 0000-1111, the corresponding receive output. Download can be realized
CPLD_example
- 安徽零零电子的LPLD例程-Routine electronic LPLD Anhui Page
VerilogHDL_book
- Verilog HDL的基础知识.pdf, 主要讲解Verilog HDL的基础知识, 适合初学者阅读-The basics of Verilog HDL. Pdf, mainly on the basics of Verilog HDL for beginners to read