资源列表
TSXD
- 本人开发贴片上下位机程序的调试心得。里面包含着艰辛和泪水，望对各位有帮助-I developed upper and lower computer chip debugging experience. Which includes pain and tears, hope helpful for you
Sharp_3DTV_HDMI_EDID
- 夏普 3D TV HDMI EDID 码-SHARP 3D TV HDMI edid code, for reference.
jiedian
- AD7745/1D7746的c语言程序，已经调试成功-AD7745/1D7746 c-language program has been successful commissioning
digital_clock
- 自己用verilog HDL写的一个数字钟模块，包括校时功能，在Maxplusii下调试和下载通过(A digital clock module written by Verilog HDL, including timing function, debugging and downloading through Maxplusii.)
lab2
- 基于FPGA的智力抢答器，基于Xilinx器件，包含主程序、仿真代码。(Intelligent answering machine based on FPGA)
fifo
- fifo模块，改模块使用同步fifo设计，里面包含一些设计技巧，读延迟最少(The module of FIFO is modified by using synchronous FIFO, which contains some design skills and the least latency.)
Desktop
- 一个简单的8 - 3 编码器，主要适用于初学人员参考，很好的例程。(A simple program means to encoder.)
ddc
- 下变频采样、本振和滤波三个过程涉及到的详细代码与注释(Detailed code and notes for down conversion sampling, local oscillator and filtering)
sram_sp_hse_8kx8
- SRAM 8K*8 芯片存储器 芯片存储器 芯片存储器(SRAM 8K*8 Chip memory Chip memory)
elevator
- 八层电梯，有密码开关，警报开关，quartusⅡ综合，cycloneⅤ的板子(There are password switches, alarm switches, and eight layers of elevator display, Quartus II synthesis, cyclone V board.)
POC
- 实现了计算机系统中作为I/O模块的POC。(It simulates the POC module which works as an I/O module in a computer system.)
crc16
- verilog 语言下的硬件CRC校验：CRC16(CRC verification in Verilog: CRC 16)