资源列表
boxingfashengqi
- DDS波形发生器，能够产生方波和正弦波的双通道的波形发生器，在quartus环境下运行-DDS waveform generator to produce square wave and sine wave of dual-channel waveform generator, runs under the environment in quartus
RS232Organ1
- 基于FPGA设计的电子琴，VHDL语言和VB开发-FPGA-based keyboard design, VHDL language and VB developers
sci
- VHDL编写的仿单片机串口通信程序，具有校验等功能-Written in VHDL simulation microcontroller serial communication program with checking functions
traffic
- VHDL语言设计的交通灯，具有黄灯等待功能。-VHDL language design of traffic lights, waiting for a yellow light function.
div
- 利用Ｖerilog实现定点数的除法，在此基础上可考虑实现定点数的除法-Using Verilog to achieve set division points, on this basis can be considered fixed points of the division to achieve
PL3106chipmanual
- PL3106芯片手册v1.1载波通信接收电路设计程序低压电力线载波-PL3106 chip Manual v1.1 carrier communication receiver circuit design program in power line carrier
pingpang
- 乒乓球游戏，由quartus ii图形化界面编程，也可以得到VHDL的程序-pingpong
U200810602_ChenYH
- fpga 的简单程序 能够检测姓名字母产生不同的信号-fpga simple procedure to detect the signal names of the letters have different
verilog_examplesP35
- 王金明的《Verilog 程序设计教程》中的所有程序！-Wang Jinming' s " Verilog Programming Tutorial" in all programs!
ICDesignVHDLTutorial
- 《集成电路设计VHDL教程》一书中的源文件，都是VHD格式的！-" IC Design VHDL Tutorial," a book of the source file is VHD format!
adc7663
- 介绍了ad7663的转换程序的VHDL描述-Introduced ad7663 VHDL descr iption of the conversion process
STOPWATCH
- 是基于FPGA/CPLD的跑表程序，可以存储记录多个运动员的跑步时间，是利用VHDL语言编写的，可以有助于学习EDA技术，可以参考学习，可以帮助你完成VHDL语言的课程设计。-Is based on FPGA/CPLD s stopwatch program, many athletes can store records of running time, is the use of VHDL language, and can help to learn EDA, can refer to t