资源列表
nand_flash_ctl
- NAND flash的VHDL控制代码，可以看一下-VHDL control code of NAND flash
spram
- 基于altera fpga 的单口ram ip核的应用实例，包含整个工程和moselsim仿真，数据，写使能，地址都是用模块来产生的。-Altera fpga single port ram the ip core application instance, contains the entire engineering and moselsim of simulation data, Write Enable, addresses are generated by the module.
dpram
- 包含整个工程，是用verilog来编写，实现双口ram的功能-Contains the entire project is to write Verilog to achieve the function of the dual-port ram
dpramcore
- 基于altera fpga的dpram ipcore 设计，包含整个工程和modelsim仿真文件。读写地址及读写使能是通过数据产生模块来产生。-Altera fpga dpram ipcore design, including engineering and modelsim simulation file. Read and write address and read and write is through the data module.
hanshack
- 用verilog编写的握手通信机制（req和ack），方便大家了解整个流程。-Use the verilog language to write the handshack commulation ways(req and ack)
VGA-PX1000
- PX1000是半长的PCI VGA采集卡，可将PC机显卡等图形设备输出的VGA信号（模拟RGB信号），经过高精度的模数转换和相关处理后，通过PCI总线输出给主机-PX1000 is a half-length PCI VGA capture card, the graphics device as a PC graphics card output VGA signal (analog RGB signal), after a high-precision analog-to-digital c
vga_display
- fpga vga 竖条 棋盘 显示程序-Fpga VGA ShuTiao board show program
111
- 波形发生器，可产生方波、正弦波、三角波、锯齿波，并且频率可调-Waveform generator, can produce square wave, sine wave, triangle wave, the sawtooth wave, and the frequency adjustable
spi-vhdl
- 用vhdl写的spi通信，arm为主设备，fpga为从设备，其中包括代码，以及具体协议-failed to translate
VDK9R12
- it is for convolutional code decoder by viterbi alogrithm.
232uart0
- 232uart msp430f449使用的是uart0口-232uart msp430f449used uart0
zhong
- 基于FPGA的数字时钟，能校时、校分，整点报时。-fpga clock