资源列表
Lab23_AD
- 测量连接在P0.27,P0.28引脚上的AIN0,AIN1的模拟量输入端的两个电位器可调的直流电压,将模拟量转换成数字量送LED数码管显示-Measurement connected to the P0.27, P0.28 pin AIN0, AIN1 analog inputs of the two DC voltage adjustable potentiometer, the analog into a digital number to send LED digital display
basegate
- verilog的基本门电路描述 附带功能仿真波形-verilog descr iption of the basic gate circuit functional simulation waveforms with
2
- EDA的课程设计，利用VHDL语言、PLD设计基于FPGA的出租车计费系统，选用ALTERA公司低功耗、低成本、高性能的FPGA芯片EPF10K10，以MAX+PLUSⅡ软件作为开发平台，设计了出租车计费器系统程序并进行了编译，功能仿真和下载。使其实现计费以及预置和模拟汽车启动、加速、停止、暂停等功能，并动态扫描显示车费数目。-EDA curriculum design, the use of VHDL language, PLD design FPGA-based taxi billing s
3
- 电子数字钟设计实际上是一个对标准频率（1Hz）进行计数的计数电路。振荡器产生的时钟信号经过分频器形成秒脉冲信号，秒脉冲信号输入计数器进行计数，并把累计结果以“时”、“分”、“秒”的数字显示出来。-Electronic digital clock is actually a standard frequency (1Hz) to count the counting circuit. Oscillator clock signal through the divider formed second
DDS
- DDS数字频率合成的verilog代码，附有正余弦查找表等-DDS digital frequency synthesis verilog code, with a cosine look-up table, etc.
rom
- 该源码是基于查找表的VHDL代码实现DDS-The source code is based on the VHDL code look-up table DDS
datacompare
- 采用verilog语言来进行数据比较器 附带仿真波形-Verilog language used to compare data with simulation waveform control
keyscan
- 基于verilog的键盘扫描程序，实现4*4键盘的扫描-Verilog-based keyboard scanner, to achieve 4* 4 keyboard scanning
Verilog
- Verilog的PPT教程，简明地介绍了如何编写Verilog程序，是学习Verilog语言很好的资料-The PPT Verilog tutorials, concise descr iption of how to write Verilog program is very good information to learn Verilog language
touch_screen_verilog
- 一段用于在触摸屏上显示内容的显示代码，可帮助朋友解决一些需要在触摸屏上进行显示的问题-Touch screen display code
chenxu
- 3—8译码器是由8个3输入“与非”门构成，采用VHDL语言描述，从行为、功能对3—8译码器进行描述，不仅逻辑设计的容易，而且阅读方便。-3-8 decoder input by 8 3 " and not" the door structure, use of VHDL language descr iption, from the behavior and function of the 3-8 decoder is described, not only the logic
shierjinzhi
- 十二进制计数器应用VHDL源代码编写的，程序易懂-Ten binary counter applications written in VHDL source code, the program easy to understand