资源列表
seg7led
- quartus 2七段管的html语言实现-quartus 2 html language seven sections of pipe
ledwatertest
- 一个用verilog 编写的流水灯程序，对于初学者比较有用，主要用于理解状态机转换。-Written in a flowing light with verilog program more useful for beginners, mainly for the understanding of the state machine transition.
fpga
- 包括fpga所以的程序，是一份很好的学习资料-Including fpga so the procedure is a very good learning materials
risc8
- 8 bit risc code with verilog
fulladder
- full adder code in vhdl using xilinx tool
carry-ripple
- carry ripple adder code (whole project) in vhdl using xilinx tool. VHD file has source code
Circuit-Design-with-VHDL---V.Pedroni-(2004)-WW.ra
- circuit design with vhdl by Volnei A. Pedroni
FPGule
- FPGA VXI总线多功能模块设计FPGA VXI-bus Multifunction Module-FPGA VXI-bus Multifunction Module
Wiley.IEEE.Press.RTL.Hardware.Design.Using.VHDL.A
- Wiley IEEE PRESS RTL Hardware Design using VHDL 2006
eliminate_dithering
- 消抖电路的Verilog描述，经过modesim仿真，在板子上调试可行-Debounce Verilog descr iption of the circuit, after modesim simulation, debugging possible on the board
add_tree
- 8*8乘法器 采用树形结构，如有不足之处请指正-8* 8 multiplier with tree structure, please correct me if inadequate
AlteraFPGA_CPLD-for-junior
- FPGA入门好书，与目前众多书籍相比，值得一看。-Introduction to FPGA books, compared with the current number of books, worth a visit.