资源列表
fifo
- 先入先出先
verilog_LCD12864
- LCD12864显示汉字 verilog 语言-LCD12864 display Chinese characters verilog language
add_tree
- 加法树的源代码，是乘法和除法的基础，也即数字电路的verilog基础代码，已经仿真过，完全正确-Adder tree source code, multiplication and division, digital circuit verilog code base simulation entirely correct
mult4x4
- 4*4乘法器的源代码，利用FPGA的查找表实现，是数字电路和FPGA的经典乘法器源代码-4* 4 multiplier source code, FPGA lookup table to achieve classic digital circuit and FPGA multiplier source code
spi_iic
- spi_iic的接口代码，利用lattice的FPGA验证过，很经典的收藏电路-spi_iic interface code, the use of lattice FPGA verification, the classic collection of circuit
driver8
- 最近调试成功的AD9928初始化电路，连接CCD即可得到图像，奉献给大家-Recent successful commissioning of the AD9928 initialization circuit connected to the CCD can be obtained by image, dedicated to you
MFSG
- 实现一个可变速率的伪随机码发生器。通过拨码开关实现模式选择，选择的模式会通过数码管显示出来，同时不同的模式对应不同码速率的伪随机码。-To achieve a variable rate of the pseudo-random code generator. Mode selection via DIP switch, the mode selected by the digital display, and different modes correspond to different co
CP_ADDER
- 利用ISE开发环境实现802.11a物理层OFDM系统中加入循环前缀的模块。-ISE development environment to achieve 802.11a physical layer OFDM system module of the cyclic prefix.
DATA_16QAM_MAP
- 利用ISE实现802.11a物理层OFDM中星座映射的模块。-ISE 802.11a physical layer OFDM constellation mapping module.
cpld_now
- 多周期同步法测频程序，晶振为40MHz，测量15-30K之间的频率，100Hz的输出频率,-Multi-cycle synchronization method of frequency measurement procedures, crystal 40MHz measurement frequency between 15-30K, the output frequency of 100 Hz,
DATA_interleaver
- 使用ISE开发环境实现802.11a物理层OFDM系统中交织模块-ISE development environment to achieve 802.11a physical layer OFDM system, interwoven module
DATA_Pilot_Insert
- 使用ISE开发环境实现802.11a物理层OFDM系统中插入导频的模块-802.11a physical layer OFDM system by inserting pilot module using ISE development environment to achieve