资源列表
Efficient Barrel Shifter
- Barrel Shifter is used to shift bits by just giving the shift amount and mode of shift
sd_controller.v
- SD卡的IP核，Verilog代码编写，与MCU挂载后实现SD卡的读写数据。-SD card IP core,programmed by verilog,link to MCU can R/W data to the SD card.
t4_fifo
- FIFO的verilog与VHDL的实现，并与FIFO的IP核做对比，为了方便大家学习，每个文件均附有测试脚本文件，希望对大家有用。-The FIFO verilog and VHDL implementation with FIFO IP core to do comparison, in order to facilitate learning, each file with a test scr ipt file, we want to be useful.
t1_bin2bcd
- 二进制转BCD的verilog程序，实现二进制数到BCD的转换，该程序具有节约FPGA的内部逻辑资源等特点- Binary to BCD s verilog procedures to achieve binary number to BCD conversion, the program has an inter
t2_manchester_coder
- Manchester 编码器的Verilog与VHDL实现，并分别采用moore和mealy机对其进行描述，比较了两种实现方法的不同。并且每种情况都给出了测试脚本，希望对您有用。-Manchester encoder Verilog and VHDL realization and moore and mealy machines were used to describe it, compare the two implementations of different methods. And
eeprom
- 实现I2C协议下EEPROM存储的数据读写控制-Under I2C protocol to achieve read and write data stored in EEPROM control
t1_comm
- 该程序包括数据的发送，加密，奇偶校验，接收，解密等模块，实现了一个完整的收发操作。为了测试方便，我们将接收到的数据直接引入发送端口，为此，我们编写了测试脚本文件，验证程序的正确性。该程序模块较多，读者可参考压缩包内的原理框图文件，以便于理解。-The program includes sending, encryption, parity, receive, decrypt data modules to achieve a complete transceiver operation. In
cpc1
- 实现序列检测的功能，对特定数字序列成功的检测-Achieve the function of sequence detection for detecting the success of a particular sequence of numbers
VGA
- 一个vga的完整工程，自己做的，相关的频率可以在网上找到-Vga of a complete project, do it yourself, the relevant frequencies can be found online
module
- 自己平时写的几个简单的模块，可以参考一下-He usually wrote a few simple modules, you can refer to
adder
- 自己做的几个不同方式实现的加法器的方法，可以参考一下-Adder several ways to do their own different ways, you can refer to
MODE
- 自己的找到的一些资料，感觉挺有用的，可以下来-Some find their own information, I feel quite useless, you can look