资源列表
hh.rar
- 串行输入并行输出 用vhdl语言描述的 有源代码主打色,Serial input parallel output using vhdl language to describe the main color of the source code
rom.rar
- 基于Verilog语言编写的各种只读存储器rom和随机存储器ram,Verilog language based on a variety of read-only memory rom and random access memory ram
yanshi.rar
- 给予VHDL的延时函数 是简单的开始时间的延时,VHDL delay to the start of the function is a simple time delay
dct.rar
- 离散余弦变换的设计源代码以及测试源代码和仿真图,Design of discrete cosine transform source code and test source code and simulation plan
xapp866
- 用于 Texas Instruments 模数转换器的 Virtex-4 和 Virtex-5 接口-Texas Instruments ADC for Virtex-4 and Virtex-5 Interface
Fifoed_avalon_uart_9.3
- Altera真正可用的带FIFO的UART组建。-Altera FIFO UART
EFA_mentor_keygen_2010
- EFA_mentor_keygen_2010.rar，请穷技术人员下载使用，不要用于商业.-EFA_mentor_keygen_2010.rar, please download the poor technical staff, not for business.
UART
- FPGA的UART程序，非常好的，讲解详细，我当初看了好多都看不懂，看了这个以后终于明白-FPGA' s UART program, very good, detailed explanation, I had read a lot have not read, finally realized after reading this
FPGA_SSI
- 文档中的verilog代码实现了FPGA与SSI总线的数据协议链接-Verilog code in the document of the FPGA data bus protocol and SSI links
VHDL语言实现的arm内核
- 5个ram核，arm6_verilog,arm7_verilog_1,arm7_VHDL,Core_arm_VHDL,nnARM01_11_1_3 arm6_verilog.rar 一个最简单的arm内核，verilog写的，有点乱 arm7_verilog_1.rar J. Shin用verilog写的arm7核心，结构良好，简明易懂 nnARM01_11_1_3.zip.zip nnARM开源项目，国防科技大学牛人ShengYu Shen写的，原来放在opencores上，
pipelined-mips-cpu
- 用verilog语言描述了MIPS的5级流水线。-Language described by verilog MIPS 5-stage pipeline.
AD7938controllor-VHDL
- VHDL语言的有限状态机法控制8位/12位自动转换通道模数转换器AD7938-VHDL, FSM method to control 8-bit/12-bit ADC AD7938 auto-conversion channel