资源列表
DE1_i2sound
- Good vhdl code for WM8731
1chipmsx-cd
- VHDL实现的任天堂NES游戏系统，包含了CPU，APG，GPU等各个器件，可以下载到FPGA开发板上运行-VHDL implementation of the Nintendo NES game system includes a CPU, APG, GPU and other various devices, can be downloaded to the FPGA development board to run
multiplyingunit
- 其乘法器原理是：乘法通过逐项移位相加原理来实现，从被乘数的最低位开始，若为1，则乘数左移后与上一次的和相加；若为0，左移后以全零相加，直至被乘数的最高位-Its multiplier principle is: the sum of multiplication through each shift principle to achieve, from the lowest bit multiplicand to start, if 1, then the multiplier on the l
VGA
- 压缩包中包含了用Verilog编写的视频控制模块，实现PAL制式到VGA制式的实时转换，同时包含了VGA专用ram配置模块，可直接实用-Compressed package includes the preparation of the video with the Verilog control module, PAL format to achieve real-time conversion to standard VGA, VGA also includes dedicated ram
mult16s
- 16位乘法器，VHDL语言编写的，供大学交流学习-16-bit multiplier
EEPROMVerilog-HDL
- EEPROM的Verilog HDL源代码，代码全-EEPROM of the Verilog HDL source code, code all. . . . . . . .
iscas89_verilog
- Verilog HDL 时序基准电路 ISCAS89-ISCAS89 sequential benchmark circuits Verilog HDL
mp3
- MP3音频解码的verilog源代码，已经验证过的，可综合-MP3 Audio coding
mp3decoder
- verilog实现mp3解码程序，包括testbench-mp3 decoder verilog implementation procedures, including the testbench
comp_16
- 设计16位同步计数器 要求：（1）分析16位同步计数器结构和电路特点； （2）用硬件描述语言进行设计； （3）编写测试仿真并进行仿真。-Design 16-bit synchronous counter requirements: (1) analysis of the 16-bit synchronous counter and circuit characteristics (2) hardware descr iption language design (3) pre
PS2MAUSE
- 用VERILOG语言写的PS2鼠标驱动程序,用来读取鼠标的状态信息-PS2 MOUSE DRIVER
mcst
- 曼彻斯特编码实现，verilog HDL 做的，我也是从网上下的-Manchester encoding to achieve, verilog HDL to do, I am also from the Internet under