资源列表
32位超前进位加法器（verilog）
- 淘的32位超前进位加法器（verilog），已验证
Crack_Altera_Quartus61.0-9.1
- Crack_Altera_Quartus61.0-9.1.rar license-Crack_Altera_Quartus61.0-9.1.rar license!!!
CY7C68013FPGA
- USB控制芯片cy7c68013与FPGA通过slave fifo方式通信，块传输数据-USB controller chip and FPGA cy7c68013 way communication through the slave fifo, block data transfer
Verilog
- FPGA经典例子，可以让大家更好的学习Verilog HDL-Classic example of FPGA, allowing you to better learn Verilog HDL
nios-ii
- ALTERA 公司NIOSII收集的一些资料，对学习NIOSII应该很有帮助-NIOSII ALTERA company collected some information should be helpful in learning NIOSII
altera_bootmethods
- altera u-boot niosii用户使用手册-altera u-boot niosii
a_vhdl_8253_timer_latest.tar
- 一个apb总线控制8253的verilog源代码，符合标准的amba 2.0的总线规范-A apb bus control 8253 of the verilog source code, amba 2.0 standard bus specification
fft
- 快速傅立叶变换（FFT）的FPGA实现,本系统采用了不同点数基2的复FFT。-Fast Fourier Transform (FFT) of the FPGA, the system uses two different points-based complex FFT.
four_adder
- 应用一位全加器的VHDL语言，创建一位全加器符号，用原理图完成四位全加器-Application of a full adder VHDL language, to create a full-adder symbol, with the principle of the completion of four full adder diagram
spartan_LCD
- 实现了spartan-3E LCD的显示驱动，可以通过LCD观察数据变化-Realize the Spartan-3 E LCD display driver, can pass LCD observation data changes
ethmac10g verilog代码
- 10G eth mac verilog代码参考下载
shipintuxiang
- 基于VHDL，实现视频图像的行列计数器，已经调试仿真通过可用.-Based on VHDL, the ranks of video image counter, has been simulated through the available debugging.