资源列表
shuzitongxinxitongjianmo02
- 基于CPLD_FPGA的数字通信系统建模与设计，本学习资料共分为4个部分，此为第一部分，供对数字通信系统建模和设计有兴趣的朋友学习参考。-CPLD_FPGA based on the digital communication system modeling and design, the learning materials is divided into four parts, this is the first part of the digital communication syste
telephone
- 实现长途电话，市话的计时，还有免费电话 在verilog中用状态机实现-The achievement of long-distance calls, the city of the time, then, there are toll-free number in verilog state machine used to achieve
shuzitongxinxitongjianmo04
- 基于CPLD_FPGA的数字通信系统建模与设计，本学习资料共分为4个部分，此为第四部分，供对数字通信系统建模和设计有兴趣的朋友学习参考。-CPLD_FPGA based on the digital communication system modeling and design, the learning materials is divided into four parts, this is the fourth part of the digital communication syst
HD_6409_file
- HD6409 编解码的fpga实现。 本例采用alter的芯片 ，成功实现HD6409的功能。 -HD6409 codec to achieve the fpga. In this case ，i use the the chip of alter , the verilog functions can implementate the function of HD6409.
i8051
- vhdl code for 8051 microcontroller
Multiplexre_Examples
- vhdl codes for representing multiplexer using diffrent methods
RAM_Examples
- Verilog hdl code for representing ram and rom "memory" using many methods
vhdl
- 循环码编译码程序，用c语言编程的 该for 循环计算码组的后3 个码元-Cyclic code encoding and decoding procedures, with c language programming cycle of the calculation of the code group for the three yards after the yuan
cf_ldpc
- ldpc码编码、译码设计，使用vhdl语言编写，包括c语言写的测试代码-ldpc code encoding, decoding design, vhdl language use, including testing c language code
ROM
- FPGA ROM利用FPGA实现的ROM只能认为器件处于用户状态时具备ROM功能。使用时不必要刻意划分，而ROM单元的初始化则是设计人员必须面对的问题。-FPGA ROM
viterbi
- Viterbi verilog generator
spimaster
- SPI IP core supporting SD/MMC