资源列表
chuzhuche2
- VHDL语言设计的出租车计费器，能模拟汽车启动、停止、暂停、车速等状态，能预置起步费、每公里收费、车行加费里程，能实现计费功能。功能强大，初学者适合看一看。-VHDL language design taxi billing, and can simulate the vehicle to start, stop, pause, speed, etc., and to preset the initial charges, fees and charges per kilometer, plus
fifomodule
- 定义了一个FIFO和相关的读写功能,比较实用,可直接作为模块使用-define a FIFO that contains the relative read and write functions, and it can be used as module directly in ISE.
ptos
- 要求：并行输入1 byte，串行输出，无数据时输出高电平，输出格式1100+8bit+奇偶校验+0011（停止位）串行输入，并行输出，检测是否奇偶校验错误，是否有帧传输错误传输每bit数据占16个clock周期 -Requirements: parallel importation of 1 byte, serial output, no data output high, output format 1100+8 bit+ parity+0011 (stop bit) serial inp
pciug159
- XILINX ISE生成PCI-CORE时产生的用户文档,帮助编写PCI通信用户逻辑,非常有用-XILINX ISE generation PCI-CORE generated user documentation to help users prepare PCI communication logic, a very useful
QAM
- VHDL-AMS Behavioral Modeling and Simulation of M-QAM transceiver system
VHDL_examples
- contain simple examples in VHDL languge
FFs
- A verilog example code of a shifter register using 3 FFs. Commented-A verilog example code of a shifter register using 3 FFs. Commented!!
vga2
- VHDL code for UP2 board of Altera, that generate a video signal to VGA port.
1
- fpga经验谈(西安大唐电信)，好不容易搜集过来的。-fpga experience (Xi' an Datang Telecom)
test_iic
- modelsim 下对iic进行仿真 包含iic时序说明-modelsim simulation under iic
logic_app
- 中际赛微15期培训班 逻辑功能试验 2009-5-Competition in 15 micro-logic function tests training 2009-5
SOPC_app
- 中际赛微 第15期培训 sopc培训内容 2009-5-Competition in the first 15 micro-sopc training training 2009-5