资源列表
verilogled7
- 特权同学的7d段数码管显示，适合初学者使用-verilog seg7
Xilinx-ISE-14v_license
- Xilinx ISE 14v_license文件，完全可以使用。-The the Xilinx ISE 14v_license file can use.
xapp941
- Reference System: PLB Tri-Mode Ethernet MAC
Nov22_11
- vhdl code related to mp3 decoder with some test benchs
huffman
- huffman decoder test bench with some file as input
Verilog-Hardware-description
- 本文的初衷是为了使已经对Verilog HDL有过初步了解的读者，能够进一步了解Verilog HDL与综合后的硬件之间的映射关系，从而改善代码风格，写出高效可综合的代码。-The original intention of this article to make readers already have a preliminary understanding of the Verilog HDL, and be able to learn more about the mapping bet
lcd
- verilog语言，该程序用于描述spartan3E开发板上的lcd的显示，对于其他的lcd显示可以从此程序修改并直接运用-verilog language, the program for describe spartan3E development board lcd display for other lcd display, can begin to changes in procedures and the use of direct
BUS_Control
- fpga上的总线控制器bus_control的控制程序，在数据采集等各个方面都会有很大的用处。-bus controller fpga bus_control control procedures, data acquisition, there will be very useful.
spi
- spi时序控制程序。在fpga中，数据传输等都会由spi进行与主控的交换，此程序用于在数据传输中spi部分的时序控制等。-The spi Timing control procedures. In fpga, data transmission, and will by spi master exchange spi part of this procedure is used in the data transmission timing control.
DE2_CCD
- 使用DE2开发板、CCD摄像头和VGA显示器，实时对人脸进行跟踪，可以随着人脸的前后移动，VGA显示不同的大小图案-The DE2 board CCD camera and a VGA monitor, real-time face tracking, can be mobile as the face of the front and rear, VGA display different patterns of size
uart_rx
- uart通信方式的接受模块，在串口通信uart中，需要记录来自外设的数据，进行采集和时序控制，进行异步的传输。-acceptance uart communication module, serial communication uart need to record data from peripherals, acquisition and timing control, asynchronous transmission.
uart_tx
- uart通信中的发送模块，在串口通信中，用于对外设进行通信，发送相应的指令，调节其时序逻辑。-uart communication sending module, in the serial communication, the communication of the peripheral and send the corresponding instruction, and to adjust its timing logic.