资源列表
Sdram_RD_FIFO
- 用SDRAM实现的读堆栈的verilog源代码-Read stack implemented SDRAM Verilog source code
Sdram_WR_FIFO
- 用SDRAM实现的写堆栈操作的verilog源代码-SDRAM write stack operations Verilog source code
mips_8bit
- Multicycle MIPS implementation in SystemC Systemc is C based for Hardware Descr iption (similar to verilog/vhdl)
mips_8bit_verilog
- MIPS multicycle Implementation in Verilog
DE2_NIOS_HOST_MOUSE_VGA
- 在Altera公司的DE2开发板上实现VGA输出游戏。-In Altera' s DE2 board VGA output game.
DE2-vgadisplay-Verilog
- 在DE2开发板的vga上显示256灰阶图片，带了完整的程序Verilog-DE2 development board VGA display 256 grayscale images with a complete program Verilog
tftlcd
- 正点原子tftlcd的fpga驱动（三个tft*.v)，还包括了大西瓜fpga开发板的数码管驱动和一个运行屏保的小功能，quartus6.0下开发。除了初始化代码，其他控制与主流tftlcd兼容。-verilog languge tftlcd driver
RelojAlarma
- This the code done to execute a alarm clock digital-This is the code done to execute a alarm clock digital
Reloj
- this a program to do a alarm clock digital-this is a program to do a alarm clock digital
VHDL
- 基于FPGA的六层电梯控制器系统,-FPGA-based six-story elevator controller system,
jishuqi_shiyan
- 用verilog语言实现按键去抖 利用分频计数实现去抖功能-Verilog language debounces the dividing count to achieve debounce feature
s
- 用VerilogHDL编写的数字频率计（附加显示编码器，可将结果显示在7段数码管上）-With VerilogHDL preparation of the digital frequency meter (additional display encoder can be displayed on the 7-segment LED)