资源列表
Mealy-FSM
- 这个程序描述的是模拟并实现了米里有限状态机的功能的实例-This procedure describes the simulation and Mealy finite state machine instance
gray
- 这个程序实现的是格雷码和二进制码的转换的问题的-This program is to achieve a Gray code and binary code conversion problems
PWM-design-Based-on-FPGA
- 本设计是基于FPGA控制的PWM信号输出系统，以EP3C5E144C8芯片为核心，通过参考信号和输入信号在计数器中的比较来实现占空比、频率可调的脉冲宽度调制信号-The design is FPGA-based control of the PWM signal output system, to EP3C5E144C8 chip as the core, to achieve adjustable duty cycle, frequency, pulse width modulation si
miaobiao
- 用VHDL编写的一个数字钟，可以完成计时功能。-VHDL prepared a digital clock, you can complete the timing function.
cyclone_lcd_controller
- Altera 公司的cyclone II板子的LCD板子驱动程序-LCD driver for cyclone II of Altera company
rxtx
- 通用串口RS232,实现了完整串口的发送和接受功能-RS232 it is imoling rs232
usb
- 实现usb的通信，实现计算机和FPGA之间的同信-Realization of USB communication
SCAN_LED
- 基于FPGA的数字时钟设计，数码管显示，简单易懂，适合初学者-FPGA-based digital clock design, digital display, easy to understand for beginners
div_ou
- 任意数偶分频小程序实现，仿真正确，希望对你们有帮助-Any number even divide applet, the simulation is correct, I hope for your help
ji_div
- VHDL实现任意奇数分频，仿真正确，通用程序。-VHDL any odd division, the simulation is correct, common procedures.
test_scramb
- VHDL编写加扰和解扰程序，程序连在一起仿真正确，并通过下板子抓数据验证程序没问题-Write scrambling and descrambling program, VHDL program together properly simulation, and data validation procedures is caught by the board no problem
communication_232
- FPGA 串口程序 VERILOG-FPGA serial procedures