资源列表
I2C_slavemodule_simulation
- i2c slave module simulation codes
fpga_uart
- verilog编写的简单串口收发代码，quartues II 下cyclone II 测试通过-prepared by the simple serial transceiver verilog code, quartues II test under the cyclone II
adcontrol
- 采用VHDL编写的FPGA的AD转换读取逻辑。AD器件为TI ADS7961 -FPGA using VHDL prepared to read the AD conversion logic. AD device is a TI ADS7961
dacontrol
- 采用VHDL编写的FPGA的DA转换读取逻辑。DA器件为TI TLC5628 -Prepared using VHDL FPGA-DA converter reads logic. DA devices are TI TLC5628
DE2_70
- DE2-70开发板实验例程 中文非官网资料-DE2-70 development board test routines Chinese non-official website information
test-ram
- design ram v8051 for project
veriog_hdl
- 华中科技大学硬件描述语言教学文档，包含硬件描述语言所有知识要点-Huazhong University of hardware descr iption language teaching document that contains all the knowledge points hardware descr iption language
VHDL.pdf
- VHDL HARDWARE DEscr iptION DESIGN CHINESE VERSION
Modelsim
- modelsim命令行的使用方法，基本的命令解释-modelsim command line using the method, the basic command interpreter
Quartus_II_11.0
- quartus 11.0 应用解析，介绍该软件的使用方法-quartus 11.0 Application analysis, the use of the software are described
Verilog_inout_
- verilog语言中inout端口的使用方法介绍-verilog language inout ports using the method described
synchronous-FIFO
- 同步fifo的使用verilog案例讲解-The use of synchronous fifo verilog case to explain