资源列表
vhdldesign
- vhdl设计，可以自学vhdl语言后做一些简单的vhdl设计！-vhdldesigning
RS422_receiver
- UART--异步串行通讯 接收逻辑 （Verilog）16倍时钟接收-verilog--A UART Receiver 16 clock
report
- ppm modulation by vhdlcod
mp
- ppm modultion by vhdl
fsk
- 过零检测法设计了一种FSK数字解调器，实现了对FSK数字调制信号的解调，达到了解调的目的-Zero-crossing detection method designed a digital FSK demodulator is realized on the demodulation of FSK digital modulation signals, to understand the purpose of transfer
fenpinchengxu
- 这四个分频程序是我们参加挑战杯时写的，非常好使-The four sub-frequency program is written when we participate in Challenge Cup, is so
signal
- 本例实现了一个FSK/PSK信号调制通信系统。通过FPGA平台上的按键控制，可分别产生FSK和PSK波形。-This example implements a FSK/PSK modulation communication systems. FPGA platforms through key control, FSK and PSK waveforms are generated.
reg4b
- 这里有12各源代码，是我自己写的，希望对大家有所帮助-Here are 12 of the source code, I wrote it myself, and I hope to be helpful
dianzibiao
- 这个是我刚刚用过的程序，只要硬件电路正确，绝对没问题-This is the procedure I have just used, as long as the hardware is correct, absolutely no problem
jian
- 一个简单的减法器，适合初学者，高手就不用看了-A simple subtraction, for beginners, masters do not need to read
traffic
- 此程序描述了FPGA对交通灯的控制，运行没问题-This procedure describes the FPGA to control the traffic lights, running no problem
vhdljingdian
- 非常经典的VHDL实例，有助于初学者的提高-VHDL is the classic example of the improvement will help beginners