资源列表
DC_ASSIGN
- counter clock vhdl file for useful to dc compilier
53607892SRAM_2
- SRM程序，好东西啊。都看看吧-SRM program, a good thing ah. Ha ha ha, look at it
17869318fpga-example1
- FPGA实例包含UARTverilog TLC7524接口电路程序 TLC5510 VHDL控制程序 DAC0832 接口电路程序 LCD控制VHDL程序与仿真等-FPGA interface circuit examples include UARTverilog TLC7524 TLC5510 VHDL process control procedures procedures DAC0832 LCD control interface circuit and simulation of V
VHDLExamples
- VHDL例子，是初学者很好的教程，很不错的-VHDL example is a good tutorial for beginners, very good
divide
- 关于verilog的分频程序 等占空比 非等占空比 小数分频 奇数分频-Verilog frequency on the sub-procedures such as the duty cycle of non-duty-cycle fractional odd frequency, etc.
verilog_logic
- 基本逻辑运算，Verilog实现，带有实现教程。-Basic logic operations, Verilog implementation, with the realization of tutorials.
61EDA_D825
- 该设计针对SMB总线进行的控制操作，包括控制，接口及仿真文件-THIS DESIGN IS PROVIDED TO YOU “AS IS”. XILINX MAKES AND YOU RECEIVE NO WARRANTIES OR CONDITIONS, EXPRESS, IMPLIED, STATUTORY OR OTHERWISE, AND XILINX SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, N
SHIFTER
- SHIFTER描述移位寄存器的功能以及VHDL硬件语言的实现-SHIFTER describe the functions of the shift register and the realization of VHDL hardware language
mc8051
- 用VHDL在FPGA上实现8051内核，代码简单，易懂-Implemented on FPGA using VHDL in the 8051 core, the code is simple, easy to understand
AD_TLC5510
- 用TLC5510实现高速A/D采样。用状态机的方法实现，在状态st0，给A/D一个采样时钟adck的上升沿，同时锁存A/D的输出-Using TLC5510 high-speed A/D sampling. The method used to achieve a state machine, in the state st0, to A/D sampling clock adck a rising edge of, and latched A/D output
lcd
- FPGA嵌入式开发中的NIOSii的LCD1602控制程序。-FPGA NIOSii LCD1602
experienceoffpga
- 主要谈谈FPGA设计时的注意事项和一些基本概念。这些都是一位有着多年FPGA设计经验的肺腑之言。-FPGA design of the main talk and notice some basic concepts. These are the years of FPGA design experience with a heartfelt words.