资源列表
FSK-modulation-and-demodulati
- FSK调制与解调程序VHDL实现源代码以及仿真-FSK modulation and demodulation process and VHDL source code simulation
DAC0832-Interface-Circuit-program
- DAC0832 接口电路程序VHDL源代码及仿真-DAC0832 Interface Circuit VHDL source code and simulation program
ADC0809-VHDL-control-procedures
- ADC0809 VHDL控制程序源代码及仿真结果-ADC0809 VHDL source code of a program to control the simulation results
TLC7524-interface-circuit-program
- TLC7524接口电路程序VHDL实现及仿真-TLC7524 interface circuit VHDL implementation and simulation program
MPSK-modulation-and-demodulati
- MPSK调制与解调VHDL程序源代码与仿真-MPSK modulation and demodulation process and VHDL source code and simulation
VHDL
- FPGA实现自动售货机，自动售货机系统VHDL程序及仿真-FPGA implementation vending machines, vending machine system procedures and VHDL simulation
vhdl
- 采用FPGA实现出租车计价，出租车计价器系统VHDL程序讲真-FPGA implementation using the taxi meter, taxi meter system VHDL program tell the truth
VGA
- 这里有很全的ＶＧＡ的实例，对VGA具有很详细的讲解和编程，主要是Verilog语言进行编写。-Here are examples of very wide VGA for VGA has a very detailed explanation and programming, mainly written in Verilog language.
I2C_WRITE
- Verilog编写iic总线代码 控制EEPROM的写程序-Verilog code written iic bus EEPROM write control procedures
fft_test
- ALTERA的FFT IP核时序的仿真，verilog语言。采用burst方式，FFT点数2048点-FFT IP core of timing simulation ALTERA, verilog language. Using burst mode, FFT points 2048 points
hdmi_20130227
- (1)包含驱动HDMI编码芯片Sil9134的时序逻辑和寄存器初始化代码，输出测试图像格式为1080P@30Hz；（2）使用Vivado2013.3开发，硬件平台为威视锐Zing开发板，搭载Xilinx Zynq7020芯片。-(1) contains drivers HDMI encoder chip Sil9134 timing logic and register initialization code, output test image format 1080P @ 30Hz (2)
CRC-code-realization
- 该代码主要用来实现通信中的数据帧里CRC校验功能-The code is used to realize the function of CRC check in telecommunication