资源列表
Chapter5
- 通信IC设计配套的第五章代码，供学习参考使用-The codes of Chapter5 of《Communication IC Design》
sp6_SRAM
- SRAM读写测试实例，每秒钟进行一次单字节的SRAM 读和写操作，用chipscope查看时序波形。 -SRAM read and write test cases, once per second single-byte SRAM read and write operations, with chipscope view waveforms.
sp6_UART_TEST
- sparant6工程， UART loopback测试实例，接收PC端发送的UART数据，原数据返回给PC端，即loopback功能。 -The project of sparant6，UART loopback test example, the receiving UART sends data PC, the original data back to the PC side, the loopback unction.
Altera-FPGA_CPLD-design-Advanced
- 《Altera FPGA_CPLD设计 高级篇》详细介绍FPGA应用于高级特性，LogicLock设计，时序约束，设计优化，高级工具及系统级设计技术，是深入学习FPGA的重要材料-" Altera FPGA_CPLD advanced part design" details FPGA used in advanced features, LogicLock design, timing constraints, design optimization, system-leve
FPGA--study
- FPGA学习的电子课件，PPT最全版，讲述详细，其中第八章还有对应工程的Verilog 代码便于实现调试与设计，并且是都是高级项目，多模块综合形成-FPGA electronic learning courseware, PPT most complete version, about the details, which also corresponds to Chapter VIII of engineering Verilog code debugging easy to implemen
wiznet5500_Verilog
- 使用Xilinx Spartan-6 XC6SLX9的FPGA驱动Wiznet5500网卡芯片的Verilog设计，可以发送和接收，已经测试，无误。-Using the Xilinx Spartan-6 XC6SLX9 FPGA driver The Wiznet5500 network card chip Verilog design can be sent and received, has been tested, and is correct.
Frequence-Test
- 基于FPGA的数字测频电路（307.617KHz），verilog文件。分频模块，循环移位除法模块，测频模块。- U57FA u4E8EFPGA u7684 u6570 u5B57 u6D4B u9891 u7535 u8DEF uFF08307.617KHz uFF09 uFF0Cverilog u6587 u4EF6 u3002 u5206 u9891 u6A21 u5757 uFF0C u5FAA u73AF u79FB u4F4D u9
30_ad706_test
- ad706相关FPGA程序VHDL源代码，可直接用！用ISE打开！-Ad706 related FPGA program VHDL source code, can use directly!
08_eeprom_test
- eeprom相关FPGA程序VHDL源代码，可直接用！用ISE打开！-eeprom related FPGA program VHDL source code, can use directly!Using ISE open!
16_sd_test
- SD卡相关FPGA程序VHDL源代码，可直接用！用ISE打开！-Sd card related FPGA program VHDL source code, can use directly!Using ISE open!
aurora_IP
- Aurora协议是一款高带宽、低成本、可扩展、框架简洁、适合点对点串行数据传输的协议。-Aurora protocol is a high-bandwidth, low-cost, scalable, simple framework for point to point serial data transfer protocol.
decode
- 用Verilog实现汉明码编码，经测试可正确使用，代码简洁-Verilog with Hamming code encoding, the test can be used correctly, the code is simple