资源列表
decode
- 用Verilog实现汉明码的解码，经测试可以正常使用，且代码简介-Verilog with Hamming code to achieve the decoding, the test can be used normally, and the code
cic
- 无线通信中的DDS原理，讲解了FPGA实现数字频率合成器-Wireless communication in the DDS principle, to explain the FPGA to achieve digital frequency synthesizer
design
- 状态机描述风格，具有工程价值的状态机结构 源自华为内部-State machine descr iption style, with the value of the state machine structure- Huawei internal
DDS
- 用FPGA实现DDS，代码测试正确，可用于初学者学习使用-FPGA with DDS, code testing is correct, can be used for beginners to learn to use
verilog经典实例
- 讲述了135个有关verilog的经典例程。帮助您快速掌握verilog这门语言。
singnt
- 基于verilog的正弦发生器,可以产生正弦信号-Based verilog sine generator，Can produce a sinusoidal signal
FIFO_control
- 一个32*8FIFO控制器代码，涉及输入输出时的地址变化及参数应用。-A 32* 8FIFO controller code, involving the input and output address changes and parameter applications.
lcdILI9325FPGA
- lcdILI9325FPGA lcd FPGA
verilogsram
- FPGA VERILOG SRAM 驱动 vhdl 开发-FPGA VERILOG SRAM drive vhdl development
fpga-KEY-UART-SRAM
- fpga KEY UART SRAM 驱动 程序 VHDL VERILOG-fpga KEY UART SRAM driver VHDL VERILOG
FFT
- verilog xilinx IP实现FFT仿真-Verilog xilinx IP implementation FFT simulation
Zedboard_Pmod_CAM_5M_R__Demo
- zedboard开发环境下，OV5620图像采集和VGA显示系统，采用BRAM祯缓存-Under zedboard development environment, OV5620 VGA image capture and display system that uses BRAM cache Zhen