资源列表
tb_ahb_master.rar
- this is a AMBA AHB code for master.,this is a AMBA AHB code for master.
lab.rar
- verilog hdl经典例程，全部调试通过,verilogHdl example，all can be used
7941952NCO_sin.rar
- NCO 代码设计 使用VHDL语言 ,nco
ARM7TDMI.rar
- ARM7核在FPGA中的VHDL代码实现,ARM7 core in the FPGA in VHDL code
DDR_SDRAM.rar
- DDR RAM控制器的VHDL源码, 实现平台是Lattice FPGA,DDR RAM controller VHDL source code, the realization of Lattice FPGA platform is
radio.rar
- 本程序演示 ：以非利普TEA5767 为核心的，高中频处理，以及立体声解调，高频锁相环为一体的收音程序， 1 支持手动输入频率 频率范围：87。5MHZ - 108。5MHZ 2 自动搜索电台（本程序已经写好，但效果不太理想，有假台） 3 支持电台编号功能（存储电台频率到24C02） 4 支持频率微调 5 支持电台选择 ,This procedure demo: TEA5767 non-Lipkin at the core, high-frequency processin
LCD_PS2.rar
- 基于ALTERA公司的NIOSII的通用TFT-LCD控制器及PS2鼠标设计,NIOSII based on ALTERA' s common TFT-LCD controller and PS2 mouse design
LCD.rar
- 有限状态机的设计——LCD显示控制实验，用VHDL编写程序，整片报告,Finite state machine design- LCD display control experiments, using VHDL programming, the whole report
clock.rar
- 具有流水灯报点的数字钟实验 含有报告，用VHDL编写,Water at point of light with the number of minutes containing the report of the experiment, prepared by VHDL
SDRAM_VerilogCode.rar
- 基于FPGA的SDRAM控制器Verilog代码，开发环境为Quartus6.1，控制SDRAM实现对同一片地址先写后读。,FPGA-based SDRAM controller Verilog code, development environment for Quartus6.1, control of SDRAM to achieve the same address one after the first time to write.
SDCard_Controller.rar
- SD卡控制器IP. 兼容SD卡协议2.0。与wishbone bus 接口，方便与其他IP连接使用。 ,SD Card Controller IP. Compatible with SD Card Agreement 2.0. With the wishbone bus interface to facilitate the use of other IP connections.
FPQ.rar
- VHDL实现分频器 有仿真图 有实验报告,VHDL simulation of the realization of crossovers have the report there were experimental