资源列表
GPS_CA_CODE_GEN
- gps接收机码发生器原代码，已经在实际工程中得到应用。供大家参考。-gps receiver code generator source code, has been applied in practical engineering. For reference.
test1
- FPGA开发中的数码管显示程序，可显示0~15的十六进制数- FPGA development of digital tube display program, can show the number of 0~15 sixteen
Verilog_ex5
- 基于FPGA的数码管实验，实验板选用DE1-Digital tube experiment based on FPGA
Verilog_ex4
- 基于FPGA的按下key1键，led0显示SOS信号实验，选用DE1实验板。-Press the key key1 based on FPGA, led0 experiment shows SOS signal
Verilog_ex3
- 基于FPGA实验板的SOS信号实验，用一盏LED灯实现SOS信号的亮灭。-Based on the FPGA experimental board experiment of SOS signal
Verilog_ex2
- 基于FPGA实验板的按键消抖实验，实验板选用DE1-Based on the FPGA experiment board keys away shaking
Verilog_ex0
- 基于FPGA实验板的流水灯实验，实验板为DE1-Running water light experiment based on FPGA experimental board
div_div
- 可对时钟进行分频，计数功能,任意分频器 vhdl-counter vhdl
ex3-6-bank_no_sys
- 银行叫号系统，已经仿真验证，并且在硬件平台测试-Banks have simulation, snarling system, validation, and test the hardware platform
basys3_basic_demo
- basys3_basic_demo，basys3开发平台的例程，在硬件平台已经验证-Basys3_basic_demo basys3 development platform of the routines in hardware platform has been validated
FLASH_PCB
- M25P64-SPI-FLASH芯片的FPGA控制程序，已仿真验证-M25P64- SPI- FLASH chip FPGA control program, simulation
I2C
- I2C接口FPGA程序,在VIVADO平台实现，已在硬件验证-The I2C interface FPGA program, implementation, the VIVADO platform was validated in the hardware