资源列表
car-VHDl
- 计程车计程器，FPGA实现，用VHDL实现，包括LCD12864驱动程序-Taxi taximeter, FPGA implementation, using VHDL realization, including LCD12864 driver
ellip-(1)
- 基于FPGA的椭圆滤波器 采用VHDL语言 使用quartus仿真-Elliptic filter FPGA-based simulation using VHDL language quartus
Verilog-HDL
- 此压缩文件包里是一些很经典的用Verilog硬件描述语言编写的程序，有需要的朋友可以看看。-This compressed file package is very classic with Verilog hardware descr iption language programs, there is a need friends can see.
VHDL_RAM_FIFO_ROM
- VHDL代码实现FIFO从ROM中读取数据然后传输到RAM中-VHDL code for FIFO read data ROM to RAM and then transfer
example14-ADC-ok
- 基于verilog HDL开发的ADC tlc549程序控制，已经调试通过。-Based verilog HDL developed ADC tlc549 control program has been adopted debugging.
example20-LCD12864
- FPGA 12864lcd驱动程序，verilogHDL语言开发，可直接使用。-FPGA 12864 lcd driver, verilog HDL language development, it can be used directly.
example17-DS1302_ok
- FPGA verilog HDL开发的时钟芯片DS1302程序，调试可用。-FPGA verilog HDL developed clock chip DS1302, debuggers are available.
example19-LCD1602
- 基于verilog HDL的LCD1602显示程序，调试通过，可直接调用。-Based verilog HDL of LCD1602 display program, debugging through, can be called directly.
CRC
- crc冗余检验，可以进行15,16位的检错，仿真ok-crc redundancy check can be 15, 16-bit error detection, simulation ok
traffic
- 用quartusII编写，实现双向交通灯运行，仿真ok，可以直接下板子-Quartus II with a written two-way traffic lights running simulation ok, directly under the board
frequency-generation
- 基于VHDL语言的分频器，输入四位比特控制产生相应的输出频率。-Frequency divider based on VHDL language, input control four bits to produce the corresponding output frequency.
CoveragePkg
- osvvm coverage packages that is helpful for vhdl verification