资源列表
FPGA设计高级篇(Xilinx版)
- FPGA设计的高级篇,xilinx出品,适合已经入门想要进阶的学习(FPGA design advanced article, Xilinx produced, suitable for already started, want advanced learning)
axi3_axi4_perfect
- 介绍AMBA,axi3 与 axi4的一些基本知识,并详细介绍了传输特性(Introduction to AMBA. Some features between axi3 and axi4 and transfer features)
code
- 使用HLS实现的能进行手写识别的CNN网络,使用的是MNIST数据集(Realize CNN network using HLS tool)
Vivado--设计流程指导手册-(含安装流程与仿真)
- vivado设计流程指导文件,里面包含有软件安装流程以及仿真流程(Vivado design flow guidance document, which contains software installation process and simulation process)
ADS7946
- 关于ADC7946的驱动,使用Verilog语言写的。亲测没有任何问题(The driver module about the ADC7946)
f32c-master
- FPGArduino源码,f32c:VHDL的MIPS和RISC-V指令集实现(FPGArduino source code, f32c:VHDL MIPS and RISC-V instruction set implementation)
定点乘法器设计
- 讲解FPGA逻辑设计的乘法器设计方法,优化逻辑资源(Explain the multiplier design method of FPGA logic design and optimize logic resource)
jtag fsm
- jtag接口的状态机实现,李庆华《通信IC设计》随机代码(State machine implementation of JTAG interface)
简易数字钟
- 基于basys3的简易数字钟,可用于vivado开发环境入门,功能有计时和显示模块。(Basys3 based simple digital clock, vivado development environment can be used for entry, function, timing and display module.)
vga_top2
- EDA课设中的vga显示,含有源代码和整个工程各种文件(EDA class set in the VGA display, containing the source code and the entire project various documents)
RS_422
- 在K7FPGA上利用verilog语言编写的RS422串口,由于没找到Verilog所以选择了VHDL(On the K7FPGA, using Verilog language RS422 serial port, because did not find Verilog, so chose VHDL)
i2c
- 使用verilog语言实现iic协议,可实现多字节读写(Implementation of IIC protocol in Verilog language)