资源列表
AD7864
- AD7864控制逻辑。Verilog语言编写。-AD7864 control logic. Verilog language.
ad7864
- ad7864的控制程序，靠计数器排的时序-ad7864 control program
DW_ahb_dmac_sbiu
- designware提供的dmac slave接口硬件描述语言-designware provide the source code verification VIP FIFO
Verilog_for_BCH
- 使用verilog语言实现BCH编码，用于通信信道编码-Using verilog language implementation BCH coding, channel coding for communication
spi93c46
- CPLD控制93C46的HDL示例代码，只是简易测试而已哦-CPLD control the 93C46 of the HDL sample code, just simple test just oh
crack_modelsim_6.6d
- crack_modelsim_6.6d，最新版modelsim仿真软件-crack_modelsim_6.6d, the latest version of modelsim simulation software
clock
- 万年历与电子时钟的VHDL程序设计，万年历与电子时钟的VHDL程序设计-clock
vga256
- 基于FPGA的VGA显示,256色显示,学会使用FPGA的ROM设计方法-FPGA-based VGA display, 256 color display, learn to use FPGA-ROM Design
current_measurement
- 这是一个实现了无刷直流电机闭环控制电流环检测的程序，一起还有滤波器的使用。性能良好。为个人原创-This is a realization of the closed-loop control of brushless DC motor current loop detection procedure, also with the use of filters. Good performance. Be original
HDB3_decode
- 用Verilog HDL语言进行HDB3译码，并通过Quartus Ⅱ仿真验证-With the Verilog HDL language HDB3 decoding, and simulation by Quartus Ⅱ
SPI_Slave
- SPI Slave example (VERILOG HDL)
ledtest
- 基于rvds的简单测试程序，运行的目标版是ok6410,led测试程序。-A simple test based on rvds program run target version is ok6410, led test program.