资源列表
pwm
- 在Quartus 9.0 下实现的PWM IP核设计，周期占空比均可调。-PWM IP core design,which period and duty is adjustable.
CPU
- 用VHDL设计的cpu 用微指令方法设计 通过rom查表的方式进行设计-Cpu design with VHDL designed by microinstructions way through the design of look-up table rom
gequ
- 梁祝歌曲，用vhdl语言实现，在蜂鸣器上实现唱歌功能-Butterfly song
part01
- 周立功嵌入式系统实验教程中配带光盘资料，共分五部分-Ligong week experimental course in embedded systems equipped with CD-ROM, is divided into five parts
trafficlight
- 已应用在北京某校园内的交通灯控制程序，可以自动控制，手动控制，可以输入设定时间等等。verilog源代码-Has been used in a Beijing campus traffic light control procedures can be automatic, manual control, you can enter the set-up time, etc.. verilog source code
MIPS_CPU
- 一个完整的MIPS CPU的设计，是创新设计项目，内含详细的项目设计报告-A complete MIPS CPU design, innovative design projects, detailed project design report containing
i2s_to_parallel
- wm8731音频采集芯片的I2S采集时序的vhdl实现。-wm8731 I2S audio capture chip timing acquisition vhdl implementation.
VHDL-SPI-Module.doc
- 本spi参数化通讯模块是一个支持SPI串行通信协议从协议的SPI从接口。可通过改变参数设置传输的位数，由外部控制器给定脉冲控制传输。-The parameters of spi communication module is a support SPI serial communication protocol from the agreement from the SPI interface. By changing the parameter settings can be transmit
music_ok
- 简单的通过FPGA控制蜂鸣器播放音乐程序（verilog 源码）-Through the FPGA to control the buzzer play the music program (Verilog source code)
MPDU_ASSEMBLER
- G.hnMAC层功能代码，实现了MPDU的资源调度-G.gn MAC codeG.gn MAC codeG.gn MAC code
dff_pre_clr
- 带置复位的D触发器的Verilog描述和仿真波形。-Reset the D flip-flop with set of Verilog descr iption and simulation waveforms.
lift
- 设计一个八层楼房自动电梯控制器，用八个 LED显示电梯行进过程，并有数码管显示电梯当前所在楼层位置，在每层电梯入口处设有请求按钮开关，请求按钮按下则相应楼层的LED 亮。 -Design a controller, eight-story buildings, escalators, moving elevator with eight LED display process, and a digital display where the floor lift the current loc