资源列表
ps2
- 本程序实现的是基于FPGA的ps/2键盘接口电路，能够在数码管上显示出键盘的输入内容！-This procedure is based on FPGA implementation of the ps/2 keyboard interface circuit, able to display the digital keyboard input!
div_any_nodd
- 使用verilog硬件语言实现任意奇数分频，使用ise11.1和modelsim仿真测试-Verilog language using any odd hardware divide, and the modelsim simulation testing using ise11.1
div_n_0_5
- 使用verilog实现任意奇数n+0.5分频，使用ise11.1和modelsim se6.5仿真测试-Using an arbitrary odd number n+0.5 verilog divide, the use of simulation testing ise11.1 and modelsim se6.5
ffj
- 使用硬件语言实现分接，使用QUARTUS2软件仿真测试-Tap hardware language, the use of simulation testing QUARTUS2
stopwatch1
- stopwatch : verilog source code
watch(2)
- digital watch : verilog source code
signed_mul
- signed multiplication verilog module
decoder
- 3_8decoder verilog module
seven_segment
- 7segment verilog module
sr_flipflop
- sr_flipflop verilog model
uartTransceiver
- Verilog Serial port
verilog
- 关于数字系统设计的Verilog教程，是一本既有理论又有实践的设计大全。-Verilog digital system design on the tutorial, is a theoretical and practical design both Daquan.