资源列表
simple_fsm_moore_3_always_best
- 三段式moore FSM状态机源码的标准实现方法-3 section moore FSM source code
flipflop
- flip flop unit designed in vhdl VHDL stands for VHSIC (Very High Speed Integrated Circuits) Hardware Descr iption Language.
adder
- adder unit designed in vhdl VHDL stands for VHSIC (Very High Speed Integrated Circuits) Hardware Descr iption Language.
andgate
- and gate unit designed in vhdl VHDL stands for VHSIC (Very High Speed Integrated Circuits) Hardware Descr iption Language.
multiplexer
- multiplexer unit designed in vhdl VHDL stands for VHSIC (Very High Speed Integrated Circuits) Hardware Descr iption Language.
register
- register designed in vhdl VHDL stands for VHSIC (Very High Speed Integrated Circuits) Hardware Descr iption Language.
sipo
- shifter unit designed in vhdl VHDL stands for VHSIC (Very High Speed Integrated Circuits) Hardware Descr iption Language.
VHDL-design-example
- VHDL综合设计实例，很好的参考资源，让你快速进入VHDL学习的殿堂！-VHDL design examples, a good reference resources, lets you quickly enter VHDL learning the hall!
UART-VHDL-design-
- 设计的VHDL串口实例，感觉还不错，可以拿来借鉴和修改啊！-Design VHDL serial instance, I feel pretty good, can be used to draw and modify ah!
NiosII-example
- NIOSII电路设计 ，经典的实例祝你在学习中更准确的掌握工作中实用的技术！-NIOSII circuit design, classic examples I wish you a more accurate grasp of the practical technical work in learning!
can
- 一个典型的CAN总线的VHDL程序，非常有参考价值-A typical CAN bus VHDL program, a very valuable reference! !
ethernet
- 一个典型的以太网的VHDL程序，非常有参考价值！！ -A typical Ethernet VHDL program, a very valuable reference! !