资源列表
VerilogHDLlianxiti
- Verilog HDL练习题不错的。-Verilog HDL练习题.rar
VerilogCodingStyle
- Verilog Coding Guideline
weekly_report_guideline
- Weekly Report Guideline
vol5num2art3
- digital auto compre-digital auto compress
P_157
- From Joint stereo to spatial audio coding
dsp_codec_review
- dsp codec review book
AESverilog
- AES加密算法的Verilog语言实现，通过编译-AES encryption algorithm in Verilog Implementation
fashe
- ISE下的炮弹发射器原程序。可由此改编2010年北京市电子竞赛的题目程序-ISE artillery launchers under the original program. Beijing 2010 can thus adapt the subject of e-competition program
clock_finish
- 基于quartus2的数字时钟，时间可调-Based quartus2 digital clock, time is adjustable. . . . .
jianxiang
- 基于ISE的鉴频、鉴相器，开发板：xilinx公司spartan 3E 500.精确度1hz,1度。完全正确。-Based on ISE' s Kam-frequency phase detector, development board: xilinx company spartan 3E 500. Precision 1hz, 1 degree. Entirely correct.
wave_zhankongbi
- 基于quartus2的PWM波源代码。。 调频范围：1hz至100khz。。。很准-The PWM wave source code based on quartus2. . . . Frequency range: 1hz to 100khz. . . Is quasi-
ourmode_dian_ok
- 基于ISE的典型模块，含有GPIO-ISE based on a typical module, with GPIO. . .