资源列表
xiaobofilter
- 采用VHDL设计Daubechies 4双通道正交滤波器组，用Quartus II 仿真实现-Daubechies 4 filter group based on VHDL
cnt16
- 含同步置零异步预置数功能的16进制计数器的VHDL实现，程序尽量简化，无冗余-16 counter VHDL implementation
jiou
- 设计奇偶校验器，采用VHDL编程，既有奇校验设计，又有偶校验设计-Design parity, VHDL programming, both odd parity Design, but also parity design
separatefreq
- 采用VHDL设计分频程序，许多设计中都会用到对时钟信号进行分频-Using VHDL design to divide the program, many of the design will be used to divide the clock signal
ln-function
- 利用VHDL编写ln(1+x)这样的特殊函数逼近程序，采用Quartus 仿真-Writing the ln (1+x) special function approximation procedures using VHDL simulation with Quartus
4-2switch
- 四位拨妞开关作为输入，当输入值变化时将其转化成两位输出-The four DIP Niu switch as an input, when the input value changes, be converted into two output
yinpine2
- 基于NIOS2的VGA接口IP核，具有很好的借鉴性和参考性-NIOS VGA IP
ADoGV2_StopSignDet
- Stopsign in FPGA VHDL detection
xapp354
- Xilinx的CPU-NAND Flash接口转换代码。-CPU-NAND Flash interface code from Xilinx.
LCD1602
- 基于FPGA EPM1270芯片设置的LCD1602液晶显示，已通过测试，显示完全正常，引脚已配好，下载直接使用-Based on the FPGA EPM1270 chip set LCD1602 liquid crystal display, has passed the test, showed completely normal, pins have been matched, downloaded directly use
8-SEG-LED-Board
- 基于FPGA的EPM 1270芯片开发板的8 SEG LED Board Verilog程序，已通过测试，能正常使用，引脚已配好。-Based the EPM 1270 chip FPGA development board 8 SEG LED Board Verilog program has been tested normal use, the pin with a good.
PWM
- 基于FPGA EPM1270芯片板子的PWM程序，已通过测试，正常使用，引脚已配好-PWM program based on FPGA EPM1270 chip board, has been tested, and normal use, the pin with a good