资源列表
halfbandfiliter
- 数字信号处理半带滤波器，实现信号2倍上采样和低通滤波，16bit位宽数据-Digital signal processing the half-band filter, to achieve a signal 2 times up-sampling and low pass filtering, 16bit bit data wide
test1
- 本人的FPGA开发板的一个小小的测试程序，没多大用的，THANKS-I FPGA development board, a small test program, not much use, THANKS
OK6410A-LED-Marquee-Button-Driver
- 开发板OK6410A，LED灯和按键驱动程序！-Development board OK6410A, LED lights and buttons driver!
cpld_ads7844_50M(9-24)
- 用ads7844采集数据，用cpld做时序控制，通过串口观察和记录采集结果，用verilog编写，通过开发板验证-Collected data using ads7844 timing control with cpld verilog prepared by the serial observe and record collection results through the development board verification
Countdown
- 基于EP2C5Q208C8的数字时钟。数码管显示，按键调节控制。-Digital clock EP2C5Q208C8. Digital display, regulation and control buttons.
digtal_clock
- C51单片机上，显示时钟，闹钟，计时，用Xilinx ISE Design 编写-C51 microcontroller, clock, alarm clock, time, prepared with Xilinx ISE Design
trafficlight
- 设计题目: 十字路*通灯的设计。 二．设计要求: （一）假定系统输入时钟为200Hz。 （二）设计出以上要求的交通灯，每个方向有一个倒计时指示（两个8 段数码 管）和红黄绿三种颜色的灯。 （三）给出仿真波形。-Design topics: the design of the traffic lights at the crossroads. II. Design requirements: (a) assume that the system cloc
fpga-for-ISE-and-Spartan
- 用赛灵思ISE9.2和Spartan-3E设计的四位计数器-Four counter with the Xilinx ISE9.2 and Spartan-3E
selfRst
- 用于产生自复位的信号，有内部校验，可以确保不会误复位，复位时间也可以人为设定。-Used to generate a self-resetting signal, internal calibration, can ensure that no mistake is reset, the reset time can also be man-made.
FPGA_IIC
- 这是我编写的FPGA控制IIC的程序，用来配置型号为24C02的EEPROM，已经通过验证。-This is my own Verilog HDL program for IIC control, it can configure the EEPROM named 24C02, and the program have been tested.
daojishi2
- 在开发板上实现5秒钟的倒计时，并在数码管上显示出数字-Board realized in the development of 5 seconds countdown, and in digital tube display digital
verilog
- verilog代码颜色传感器，课程设计用的-the verilog code color sensors, curriculum design