资源列表
FPGAimage
- 关于FPGA图像处理的论文 具有很强的参考性 对于初学者有很好的参考价值-Image processing on FPGA has a strong reference to the papers of a good reference for beginners value
shuzizhong
- 基于VHDL的数字钟的设计，本文给出了详细的代码，直接可用！-VHDL-based digital clock design, this paper presents a detailed code, directly available!
auk_rtprx-v3.1.0.tar
- The Altera(R) RTP Receiver function implements a buffer for received RTP packets. Duplicated and re-ordered packets are corrected. Missing packets can be fixed using Pro-MPEG Code of Practice #3 Forward Error Correction
auk_udpipmac-v3.3.0.tar
- The Altera(R) UDP/IP function implements a hardware solution for the transmission and reception of UDP/IP encapsulated network traffic.
serialport
- 用VHDL语言，在FPGA上实现了对RS232串口的控制，能够接收从计算机键盘上输入的字符，并将接收的字符通过串口再发回到计算机。-It is a VHDL program on FPGA controling RS232 ,and it can receive and transmit data normally.
LCD
- 用verilog 语言编程，通过FPGA控制LCD,显示字符-a verilog program on FPGA to control LCD.
Verilog
- verilg 教程，学习verilog 非常好的一本书。-A usefull book for veriog learners.
uart
- 用veriolg 语言编写的串口通讯程序，通过FPGA控制串口的通讯。-a veriog program completed on FPGA to contrlo a uart to communicaton with a computer
VerilogHDL
- Verilog HDL语言，简单易懂的教程，夏文宇的第二版。-Verilog HDL language, easy to understand tutorials, Xia Wenyu the second edition.
Altera_IP_verilog
- Altera IP的产生与实现。定制一个8B10B编码器，采用verilog语言建立仿真模型，并验证。-Altera IP generation and implementation. Customize a 8B10B encoder, using verilog language, a simulation model, and verify.
vhdl
- this a vhdl book. it is the 4th edition. writer is perry. this is a very good book-this is a vhdl book. it is the 4th edition. writer is perry. this is a very good book
clk_111k
- Clock baud rate modifier