资源列表
usb_device
- FPGA的一种实现usb设备通用方法，是nois的下的实现。-FPGA a usb device generic nois under implementation.
ps2_keyboard
- verilog hdl语言编写的实现ps2键盘的代码-ps2 keyboard verilog hdl language code
SOPC_picture
- 基于sopc的数码相框设计，有具体的代码，操作步骤-Digital photo frame design based on sopc code specific steps
verilog
- verilog hdl 写的一个串口程序，编译仿真都已经通过-the verilog hdl write a serial program, compile simulation have passed
tanchishe
- 用硬件描述语言VHDL编写的小游戏，可下载到实验板上实现在8*8的点阵上的贪吃蛇游戏-Written using a hardware descr iption language VHDL game can be downloaded to the experimental board to achieve the 8* 8 dot matrix, Snake game
six-digit-counter-with-tb
- VHDL source code of six digit counter with testbench,with comments included
16-bit-A-DCa16-bit-DAC-VHDL
- 16-bit Analogue to Digital Converter&16-bit Digital to Analogue Converter VHDL source code.在modelsim下仿真通过-16-bit Analogue to Digital Converter & 16-bit Digital to Analogue Converter VHDL source code. Simulated in modelsim
2-to-4-Decoder-with--Configuration
- 2-to-4 Decoder with Testbench and Configuration This set of design units illustrates several features of the VHDL language including: Using generics to pass time delay values to design entities. Design hierarchy using instantiated components.
divider-code
- 本文档为FPGA的开发程序，用verilog语言实现了出发操作，欢迎参考。-This document is a the FPGA development program, verilog language starting operation, welcomed the reference.
LightsController
- 重庆大学数电课程设计之交通灯（QUARTUS II）-TRAFFIC LIGHTS
crc16-
- 本文档描述了一种CRC校验的方法，开发语言为verilog。程序自己写的，包括测试代码。欢迎参考-This document describes a CRC checksum method development language verilog. Write their own procedures, including test code. Welcome reference
Led_seg7
- 本文件给出了一个七段数码管的verilog代码，并附上测试代码。-This document gives a seven-segment digital tube verilog code, and attach the test code.