资源列表
shuzizhong
- 基于vhdl的数字钟完整工程文件，已在实验箱上实现-vhdl clock
i2c总线的vhdl实现和vxworks的文件系统.rar
- i2c总线的vhdl实现和vxworks的文件系统,i2c bus VHDL realization and VxWorks file system
sdr-sdram-controller-source-code
- altera 公司sdr sdram 控制器源码，是VHDL的，大家选择下载-The altera sdr sdram controller source, the VHDL, we choose to download
DDS_Power
- FPGA上的VERILOG语言编程。通过查找表实现直接数字频率合成。在主控部分通过键盘选择正弦波，方波，三角波，斜波，以及四种波形的任意两种的叠加，以及四种波形的叠加；通过控制频率控制字C的大小，以控制输出波形频率，实现1Hz的微调；通过地址变换实现波形相位256级可调；通过DAC0832使波形幅值256级可调；通过FPGA内部RAM实现波形存储回放；并实现了每秒100HZ扫频。-FPGA on the verilog language programming. Lookup table thr
Example
- ISE环境下FPGA工程实例，极富参考价值-FPGA Projects example in ISE environment, it s very useful
16example
- 夏宇闻老师的verilog数字系统设计教程书上的所有例题的源程序16章-XIA Yu-Wen teacher' s verilog digital system design tutorial books, all of the source code Example Chapter 16
00-99-Counter
- 00-99计数器的代码程序，献给初学者。-00-99 counter code program, dedicated to beginners.
Internet_adreesing
- Internet Protocol Addressing
account
- 电话计费器程序，显示卡内余额， 显示本次通话的时长；余额过少时的告警信号。当告警时间过长时自动切断通话信号。-Telephone billing program, showing the balance of the card, the time of the call balance too came from the alarm signal. Automatically when the alarm time is too long to cut off the call signal.
Telephone-billing-program
- Telephone billing program，源代码程序，试过好用-Telephone billing program, the source code for the program, tried the easy to use
keypad_7segdis
- this files in Quartus 2 are KEYPAD
1
- Verilog语言编写的电话计费器程序-Telephone billing program written in Verilog language!!!!!!!!!!!!!!!!!!! !!!!!!