资源列表
source_file
- 图像传感器数字控制模块，verilog编写，内涵ADC接口，FPGA验证通过。-image sensor digital controller module
I2C_Test
- I2C接口模块，用于连接符合I2C总线接口标准协议的传感器或者其他设备。FPGA验证通过-I2C bus interface
FPGA-clock-for-chess
- 数字电路课程设计 FPAG的棋类时钟设计 -FPGA clock for chess
V0p10
- 完整的基于verilog HDL语言UART代码~-Complete based verilog HDL language UART code to
simple_clock
- 基于ｆｐｇａ的简单时钟，可以作为本科课程设计的内容，用ｖｅｒｉｌｏｇ编写的-Fpga-based simple clock, as the content of the undergraduate curriculum design with verilog prepared
ImageRotate
- verilog实现图像旋转，可终合，并带有Testbench-verilog image rotation, and can be a final, and with Testbench
pwm_8
- 8输入来控制八种不同占空比的pwm波产生，分别为12.5 ，25 -8 inputs to control the eight different duty cycle of the PWM wave generating, were 12.5 , 25 ....
1602
- 这是一个基于fpga的，1602显示子程序，开发语言verilog hdl-This is a 51 microcontroller-based project set development language c++
vhdl
- vhdl YCBCR2RGB 111 11的转换-vhdl YCBCR2RGB
VGA
- 基于EPM240的VGA接口实验，在电脑显示屏上实现了两个框-Based on the EPM240 the VGA interface experiment, two boxes on the computer screen
SRAM
- 通过对一个数据写进sram与从里面把这个数据读出。来理解sram的基本操作方法-Through a data written into the SRAM, and this data is read out from the inside. To understand the sram basic operation method
verilogiic1121
- 主要是通过在利用I2C通讯协议来控制两个数码管-Mainly by using I2C communication protocol to control two digital tube