资源列表
waveform_gen_latest.tar
- VHDL实现NCO与LUT（查找表） VHDL实现NCO与LUT（查找表）-VHDL realization of NCO and LUT (lookup table) VHDL Implementation NCO and LUT (lookup table)
ahb2wishbone_latest.tar
- AHB总线到wishbone总线的转化的Verilog源码-AHB to wishbone verilog source code
27796735produce
- 是一个串行可预置欲裂信号发生器，可以预置8位序列进行奇校验-Was killing a serial signal generator can be preset, you can preset 8-bit sequence of odd check
Vhdl_Golden_Reference_Guide
- 英文版的VHDL参考手册，如果英文说平可以的话，应该有所帮助-VHDL reference
VHDL_tutorial
- 英文版的VHDL教程，如果英文说平可以的话，应该有所帮助-VHDL tutorial
des
- des解密加密的verilog源代码其中包含有测试源代码，仿真结果图-verilog des decrypt encrypted source code which includes testing the source code, Simulation results
huffman
- 哈弗曼编码的设计源代码以及测试源代码以及仿真结果图-Havermann source code design and testing source code and Simulation results
qnr
- 量化取整的设计源代码及测试源代码，仿真结果图和分析-Quantify the source code to take the whole design and testing of source code, Simulation results and analysis
cpu86
- this is a vhdl implementation of cpu 86
VHDL
- 这是关于VHDL的五个简单程序，跑马灯、简单时钟、4*4键盘、计价器、7人表决器。-This is about the five simple VHDL program, marquees, a simple clock, 4* 4 keyboard, the meter, 7 voting machine.
source
- 包含了verilog hdl实验的很多源代码\(^o^)/~-Contains a verilog hdl a lot of experimental code \ (^ o ^)/~
yejingdeng
- 液晶时钟 连线方式：将拨码开关的第6脚拨向"ON"方向，即给lcd供电-Crystal clock attachment: dial 6 feet of code switch to "ON", namely to LCD power supply