资源列表
3
- simple code based on verilog shifter , cla ,clg
4
- simple code based on verilog shifter , cla ,clg , ALU , PC
IicController
- IIC slave controller source code
simple_3DES
- 精简3DES加解密算法实现，该3DES加解/密系统以精简硬件结构为目标，与传统的以吞吐率为目标的流水线模式3DES加/解密系统相比，具有消耗硬件资源小，性价比突出的优点。-reduced 3DES algorithm system based on FPGA
crc
- 高速多通道crc实现，可以并行实现5个通道数据的校验，支持10GB以太网标准-High-speed multi-channel crc implementation, can be achieved in parallel 5-channel data validation, support for 10GB Ethernet standard
cordic
- 高速计算机旋转坐标算法的硬件实现，用于快速傅里叶算法的核心单元-Rotating coordinates high-speed computer hardware algorithm for fast Fourier algorithm is the core unit
color_space_converters
- 色彩空间转换硬件实现，用于图像处理，编码，解码部分-Color space conversion hardware for image processing, encoding, decoding part of the
jifei
- 在Quartus环境中，采用VHDL语言编写的出租车计费系统，系统共分为分频、状态切换、记程、计费等模块，模仿现实中出租车计费。-In the Quartus environment, the use of VHDL language taxi billing system, the system is divided into sub-frequency, state switching, recording process, billing and other modules, to imi
liushuideng
- 这是led流水灯的vhdl描述，很好的啊-led s hdl describe
Multi-networkvideocallsource
- 基于DE2的视频电话部分源码，实现了视频图像采集，VGA显示，局域网通讯等功能-DE2-based video telephony part of the source code to achieve the video image capture, VGA display, LAN communications function
DATA_scramble
- 扰码器的verilog实现,参考802.11a相关标准-Scrambler in verilog implementation
ctrl1
- 密码锁 vhdl实现的密码锁 控制程序-mimasuo