资源列表
shiftregister
- Shift Register. VHDL code and its testbench.
8risc
- 8位RISC CPU,包括alu,count,machine-8 bit risc cpu
TAXT
- FPGA VHDL 语言的的士计费系统！与现有的的士计费系统功能一样。-FPGA VHDL language taxi billing system! With the existing billing system, like a taxi
ttt
- 该系统利用VHDL语言、PLD设计出租车计费系统，以MAX+PLUSⅡ软件作为开发平台，设计了出租车计费器系统程序并进行了程序仿真。使其实现计费以及预置和模拟汽车启动、停止、暂停等功能，并动态扫描显示车费数目。-The system is the use of VHDL language, PLD design taxi billing system to MAX+ PLUS Ⅱ software as a development platform designed billing syste
bianma
- 用FPGA做数码管编码器！只有用到7段，点没有用，内有仿真-FPGA control with digital encoder to do! Only use 7, Point of no use, there are simulation
luojidanyuansheji
- 组合逻辑单元设计电路，有8个功能！都是普通的逻辑运算-Combinational logic circuit module design, there are eight functional! Logic operations are common
shijinzhi
- 利用FPGA做出十进制加减法！带有进位借位显示-FPGA to make use of the decimal addition and subtraction! By a binary digital display
fpu_add
- These programs are vhdl
an-032904-codec
- I2S fpga interface ip design from xe-I2S fpga interface ip design from xess
ss_pcm
- It was tested on a XESS XCV800 board interfacing to a proprietary device with a TI DSP, exchanging PCM streams in both directions.
usb3.0
- USB的VHDL程序通过验证准确无误大家看看 看吧-USB through the VHDL program to verify the accuracy of all look at and see and see