资源列表
xapp345_vhdl
- adc转换功能的vhdl源码，其中包含adc_interface 和转换还包含串口输出-adc tranfer
fifo
- fifo 的vhdl源程序,容量为1024*8的fifo程序代码-fifo the vhdl source code,Capacity of 1024* the fifo code 8
yMC68HC11K1sxzdmkz
- 单片机是系统的核心部件，本设计功能较多且设计较复杂，但它能够满足现代社会的需要。-Single-chip is a core component of the system, the design features and the design of more complex, but it is able to meet the needs of modern society.
ppx16
- ppx16系列单片机的vhdl内核代码，并根据该内核实现了P16C55和P16F84两款单片机。-Vhdl code of ppx16 series MCU core, and includes the realization of two MCU- P16C55 and P16F84 according to this core
main_dct
- verilog code for dct
i80386
- Intel微处理器80386的vhdl模拟，很有参考价值-Vhdl simulation of intel s 80386 microprocessor, is valuable for reference
fft_fpga
- 自己写的一个关于fpga开发的fft模块。-Wrote it myself on the development of fpga module fft.
vaa
- （１）设计一个4位十进制的频率计其测量范围1Hz~9.999KHz；6 N3 G8 k( U- @ n* A （２）记数过程结束后，保存并显示结果；-(1) to design a metric four of its frequency range 1Hz ~ 9.999KHz 6 N3 G8 k (U-@ ' n* A (2) After the counting process, preserve and display the results
uart_my
- 自己设计的串口verilog代码，已在fpga上跑过，问题无误。-Serial verilog design code, ran in the fpga, correct the problem.
router_fifo
- 自己写的一个片上网络路由节点的fifo模块，工作频率达到1ghz。-Himself wrote a piece on the network routing node of the fifo module, the work frequency of 1ghz.
pwm__vhdl
- 一个基于vhdl语言的脉冲宽度调制。并且有两个脉冲输出-Vhdl language-based pulse width modulation. And two pulse output
router_fifo
- 自己写的一个片上网络路由节点的fifo模块，工作频率达到1ghz。-Himself wrote a piece on the network routing node of the fifo module, the work frequency of 1ghz.