资源列表
uart
- 串口功能的硬件调试，串口功能，VHDL语言-A serial port function hardware debugging, serial port function, VHDL language
XianShiRiQi(weizhun)
- 数码管显示日期，用verilog语言书写，8个数码管可循环左移-Digital tube display the date, written in verilog language, eight digital tube can be cyclic shift to the left
TOP
- IFFT快速傅里叶逆变换的FPGA实现,IFFT的实现-IFFT fast Fourier inverse transformation of the FPGA implementation
clip_viseo
- 视频旋转 连续写，离散读，为了提高效率，分块突发读写。-video rotate
Quartus13.0-create-NIOS2-
- Quartus13.0创建NIOS2实验步骤说明-Quartus13.0 create NIOS2 introduction
Verilog-HDL-introduction
- 简单实用的Verilog HDL 入门教程-Verilog HDL introduction
cic_core
- CIC CORE is very good core for your projects.
hilbert_transformer_latest
- Hilbert Transform Core is very best for your projects.
BTO
- 这是一个十六进制显示译码器，可在EDA板子上实现，希望对大家有帮助-This is a hexadecimal display decoder may be implemented on EDA board, we hope to help
i2s_dome2
- 音频接口I2S的Verilog实现， -Audio port of Verilog
coordinate-transformation
- 实现坐标变换，包括clark和park变换，clark变换实现三相静止坐标转换到两相静止坐标，park变换实现两相静止坐标转换到两相旋转坐标-Achieve coordinate transformation, including clark and park transform, clarke transform phase static coordinate conversion to the two-phase stationary coordinate, park transform t
Lvbo
- 实现信号滤波，可根据外部信号毛刺干扰的特点改变滤波时钟来改变滤波宽度-Achieve signal filtering, the filter can be changed according to the characteristics of the external clock signal glitch to change the filter width