资源列表
statled_latest.tar
- a simple module to get the most of your on board heartbeat LED change or add more sequences easily in parameters file
vhd2vl-2.4.tar
- convert VHDL files to Verilog files
VGA_Qin
- VGA实验中，根据要求，动态显示图片，图片的动态效果是触及屏幕反弹 -VGA experiment, according to the requirements, dynamic display picture, dynamic picture of the effect of the screen is touched rebound
Xilinx_example
- xilinx 多核嵌入式系统设计的配套光盘源代码-Xilinx multi-core embedded system design form a complete set of CD source code
LTC2440_1
- 一款具有 5ppm INL 和 5μV 偏移的高速 24 位无延迟增量累加 (No Latency ΔΣTM) ADC LTC2440的源代码-A 5ppm INL and 5 V high speed 24 bit offset without delay increment accumulation (No Latency TM ADC LTC2440 delta sigma) source code
DDR_TEST_OK
- 接口DDR2读写测试模块，好用，测试正确-Interface DDR2 read and write test module， ，test correctly
FSK_MODULATION_DEMODULATION_CODE
- FSK调制与解调VHDL程序_好用_测试正确-FSK modulation and demodulation of VHDL program _ with _ test correctly
MASK_MODULATION_CODE
- MASK调制VHDL程序_好用_测试正确-The MASK VHDL program with _ _ modulation test
MPSK_MODULATION_DEMODULATION_CODE
- MPSK调制与解调VHDL程序_好用_测试正确-MPSK modulation and demodulation of VHDL program _ with _ test correctly
URAT_VHDL_CODE_TEST_OK
- URAT VHDL程序_好用_测试正确,项目已使用-URAT VHDL program _ with _ test correctly
ASK_DEMODULATION_AND_TEST_CODE
- ASK解调VHDL程序及仿真,项目已使用，好用-ASK demodulation VHDL procedures and simulation, the project has been used, easy to use
ASK_modulation_code
- ASK调制VHDL程序，好用，已测试通过-ASK modulation VHDL program, easy to use, has been tested