资源列表
an181_2_2
- Excalibur FPGA多主参考设计-Excalibur Solutions— Multi-Master Reference Design
rcvr
- verilog的串口接收程序，有详细注释，适合学习-verilog serial port to receive the program, there are detailed notes, suitable for learning
N-DtoA-VHDL-AMS
- 下面是一个混合信号的例子,是一个N位D/A转换器的VHDL-AMS描述-The following is an example of a mixed signal that is a N bit D/A converter described in VHDL-AMS
Op-Amp-Model(VHDL-AMS)
- 模拟信号模型-运算放大器模型Op Amp Model的VHDL-AMS程序-Analog signal model- op amp model Amp Model VHDL-AMS Op program
hdlrecord
- Bluespec sample program and program for comparator. Cyclone 2 FPGA Real Time Clock program.
diffofsignalandvariable
- How signals and variables are declared and used in vhdl
mealy_is
- How mealy finite state machine is implemented using VHDL
tristate_dr
- Hardware descr iption language for combinational circuit tristate driver how it is implemented
adder_ckt
- This a source code for how adder is implemented in FPGA-This is a source code for how adder is implemented in FPGA
multiplexer
- How multiplexer is implemented using FPGA board is given here
EP2CQ208
- 睿智FPGA开发板开发历程，芯片为EP2CQ208-Wisdom FPGA development board development process, the chip is EP2CQ208
color_bar
- FPGA实时彩条，通过vga输出，能够直接用哦-The FPGA real-time color bar, through the VGA output, can directly use oh