资源列表
Binary-BCD-code
- 用Verilog语言写的二进制转BCD码,可以作为课堂教学实验或者课后作业，有完整工程代码-Written in Verilog language transfer binary BCD code, can be used as a teaching experiment or the homework, a complete project code
Four-input-static-display
- 用Verilog语言写四位静态输入显示，可做课堂实验后课后作业，有完整代码-Written in Verilog language, according to the four static input to do homework after class experiment, has a complete code
design_pcie-based-on-FPGA
- the interface design of pcie based on FPGA
PCI_Express
- 详解PCIE基础，架构等，从基础了解到深入理解，适合基础差的-Good explain to pcie for who want to know it
ds1302
- 使用verliog设计实现驱动DS1302，利用altera的cyclone第四代验证通过-Design and implementation using verliog drive DS1302, use altera' s fourth-generation verified by cyclone
stp
- 使用verliog驱动stp液晶显示屏，通过altera的cyclone 第四代验证通过-Stp using verliog drive LCD screen, through altera verified by the fourth generation of cyclone
ps2
- 使用verliog实现ps2键盘接口的驱动，通过altera cyclone 第四代验证通过-Use verliog implement ps2 keyboard interface driven by a fourth-generation verified by altera cyclone
vga_interface
- 使用verliog实现vga接口的封装，使用altera cyclone第四代验证通过-Use verliog achieve vga interface package, use altera cyclone verified by the fourth generation
booth_multiplier
- 使用verliog设计实现booth乘法器，通过modelsim仿真验证通过-Use verliog design implementation booth multiplier by simulation by modelsim
booth_multiplier_modify
- 使用verliog改进传统的booth乘法器，通过modelsim仿真验证通过-Use verliog improve the traditional booth multiplier, verified by simulation by modelsim
lut_multiplier
- 使用verliog设计实现LUT查找表乘法器，通过modelsim仿真验证通过-Designed and implemented using the LUT lookup table verliog multipliers, through simulation by modelsim
1_2
- 基于cyclone EP1C6Q240C8的流水灯设计样本-a sample design of light water based on cyclone EP1C6Q240C8